Field of the Invention
The present invention relates to computing device peripheral connections, and more specifically, to computing device interface connectors for peripheral component interconnect (PCI) compliant devices and other devices.
Description of Related Art
The peripheral component interconnect (PCI) local bus is a type of local computer bus for attaching hardware components in a computing device. The PCI local bus specification defines an industry standard high-performance, low-cost local bus architecture. Further, the PCI local bus can support the functions found on a processor bus, but in a standardized format that is independent of any particular processor. Devices connected to the bus appear to the processor to be connected directly to the processor bus, and are assigned in the processor's address space.
PCI adapters are commonly used and many computers implement one or more standard PCI specification-defined connectors. These standard PCI adapters cannot be shared by a device other than the computer's main central processing unit (CPU), such as a baseboard management controller, because current PCI local bus connectors do not provide pins for shared or sideband connection. Another difficulty with the standard PCI connector interface is that the electrical current available to the adapter is limited due to the number and size of the connector pins dedicated to voltage and ground, especially for standby voltages. The standby current draw of many standard PCI adapters exceeds the maximum allowed by the PCI local bus specification, thus many standard PCI adapters cannot support functions that depend entirely on standby voltage. Examples of these functions include Wake on LAN (WoL) and Serial on LAN (SoL).
In view of the foregoing, there is a need for improved interfaces and specifications for connecting computer CPUs and other devices.